Most of the reference material for the Apple II that I have seen refers to the 4116 RAM chip which held 16x1 kbit.
Jup, at the time the Apple II really took off, 4116 chips had already dropped to less than twice the price of 4104, making any use of 4104 impractical. Not many were delivered using 4104, and while some users may have had 4104, they all soon replaced them by 4116, thus it's highly unlikely to find any Apple II board with 4104.
The Apple II motherboard layout seems to confirm this.
Depends on what motherboard you look at. Only newer are tied to 4116 usage.
However, early Apple II material refers to 4 KB, 8 KB, 12 KB and other memory sizes.
Yes (*1).
Did this actually exist?
Yes. All boards before the II+ were made that way, see below.
How was it implemented?
The first series of the original II board had one 16-pin DIL socked for each of the RAM rows (*2), made to 'jumper' for 4 or 16 Ki DRAM use. Here a premade block with wiring for either type could be placed, according to what chips were used. The blocks connected the necessary lines to switch CS0 (4104) and A6 (4116) as well address select lines to make RAM continuous.
The top row of this beautiful board pictured features three blocks for 16 Ki usage: (Taken from this interesting project page)
Later production runs (of the original board) had the 16 Ki version of these blocks directly soldered to the board, so only 4116 could be used. With newer board revisions the whole blocks were dropped and replaced by fixed wiring, allowing only 4116 to be used.
A look at the original schematics shows these blocks (left of the RAM area) as well as a pinout of 4104 vs 4116 (direct below RAM area)
*1 - Valid memory combinations were
4/ 8/12 KiB with only 4104
16/20/24 KiB with 1 row 4116 and 0/1/2 rows of 4104
32/36 KiB with 2 rows 4116 and 0/1 row of 4104
48 KiB with 3 rows 4116
Anything above needed RAM cards and memory switching - the 16 KiB Language Card being the granddaddy of all of them.
*2 - At Positionposition D1/E1/F1 - basically shifted one row up eachfrom the RAM row (C/D/E) they configured.