Here are two "random access, read-only memory" solutions as an example on how those were used on early computers. Both map into the address space of the CPU, and are intended to use for bootstrap programs, that load the core memory with the actual program (that one would today have in ROM).

That worked because core memory retains its contents even after power loss, so you can basically use it as a sort of ROM. It only needs to be loaded once, or re-loaded in case it gets overwritten, or has a bit-flip or similar.

The CDC series (and the Cray, too, I think) had a deadstart panel. This link has a description and a picture. It was essentially a set of 12 x 12 switches (so, 144 bits), and would contain the bootstrap program for a peripheral processor (PP), which then would first initialize itself from some other kind of storage, and then the main CPU.

The PDP-8/E had a MI8-E Bootstrap Loader card. I haven't been able to find a full picture, but this link has some close-ups. It's essentially 32 words of 12 bits (344 bits in total) hard-coded with diodes, with different variants for different bootstrap programs for different devices. You could set the start and load address with wires on the cards.

I have not found any prices for those, but from the low number of bits, you can see that it was not economical to attempt any kind of "ROM". The PDP-8 price list from 1967 lists 4 kWords (with 12 bits) of core memory at around $8000 dollars. While it was technically possible to make core rope memory at the same density, I'd would have expected it to be much more expensive, as it was no longer regular, and each bit would have to be painstakingly programmed and checked manually.

Here are two "random access, read-only memory" solutions as an example on how those were used on early computers. Both map into the address space of the CPU, and are intended to use for bootstrap programs, that load the core memory with the actual program (that one would today have in ROM).

That worked because core memory retains its contents even after power loss, so you can basically use it as a sort of ROM. It only needs to be loaded once, or re-loaded in case it gets overwritten, or has a bit-flip or similar.

The CDC series (and the Cray, too, I think) had a deadstart panel. Here is a picture of the deadstart panel of a CDC 6600, and this link has a pictore of a more fancy one, with a description. It was essentially a set of 12 x 12 switches (so, 144 bits), and would contain the bootstrap program for a peripheral processor (PP), which then would first initialize itself from some other kind of storage, and then the main CPU.

The PDP-8/E had a MI8-E Bootstrap Loader card. I haven't been able to find a full picture, but this link has some close-ups. It's essentially 32 words of 12 bits (344 bits in total) hard-coded with diodes, with different variants for different bootstrap programs for different devices. You could set the start and load address with wires on the cards.

I have not found any prices for those, but from the low number of bits, you can see that it was not economical to attempt any kind of "ROM". The PDP-8 price list from 1967 lists 4 kWords (with 12 bits) of core memory at around $8000 dollars. While it was technically possible to make core rope memory at the same density, I'd would have expected it to be much more expensive, as it was no longer regular, and each bit would have to be painstakingly programmed and checked manually.