Timeline for Carry handling during address generation on a 6502
Current License: CC BY-SA 4.0
10 events
| when toggle format | what | by | license | comment | |
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| Jul 19, 2022 at 21:42 | comment | added | Raffzahn | Oh, interesting. Well, since all pages as well as the simulator itself is pure web content, Archive.Org's copy might be an acceptable surrogate. | |
| Jul 19, 2022 at 21:09 | comment | added | Patrick LeBoutillier | Is visual6502.org down? I can't seem to be able to access it for the last couple of days... | |
| Jul 19, 2022 at 2:46 | history | edited | Raffzahn | CC BY-SA 4.0 |
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| Jul 18, 2022 at 20:59 | comment | added | Raffzahn | @PatrickLeBoutillier Yes, as said, it's always going thru the Control - after all, that's where instructions sequencing is supposed to be controlled. And yes, unlike indexing which only works with positive numbers, branches contain signed values and may result in a decrement of PCH. Thus, while working essentially the same, it does take care of the sign bit. I left out these details to keep it somewhat simple. If you're really into further details, a look at the visual 6502 may help - just don't expect it a ride for beginners :)) | |
| Jul 18, 2022 at 19:24 | vote | accept | Patrick LeBoutillier | ||
| Jul 18, 2022 at 19:24 | comment | added | Patrick LeBoutillier | Thanks a lot, very useful info. So I guess, although it is not shown on the drawing, ACR is somehow fed into "Random Control Logic" so that it can influence the control signals. Also, is it possible that using relative addressing mode with a negative offset would cause PCH to actually be decremented? | |
| Jul 17, 2022 at 15:06 | history | edited | Raffzahn | CC BY-SA 4.0 |
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| Jul 17, 2022 at 14:54 | history | edited | Raffzahn | CC BY-SA 4.0 |
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| Jul 17, 2022 at 14:31 | history | edited | Raffzahn | CC BY-SA 4.0 |
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| Jul 17, 2022 at 14:11 | history | answered | Raffzahn | CC BY-SA 4.0 |