DSP DATA D012
Lower seven bits are data output, high order bit is "display ready" input (1 equals ready, 0 equals busy)
So the output logic is: use BIT
to check bit 7 of the value in the Display Data address (This is the PIA's PB7 line), and if that bit is 0 (BPL
branches when flag N
is not set), go back and read it again. Stay in this loop until the display is ready (bit 7 of DSP Data is 1, so BITBIT
sets NN
to 1, and BPLBPL
does not branch), the proceed to push the byte to the DSP Data address.