Timeline for Were people building CPUs out of TTL logic prior to the 4004, 8080 and the 6800?
Current License: CC BY-SA 3.0
5 events
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| Jan 4, 2019 at 20:07 | comment | added | Ken Shirriff | I'm glad to see the Alto mentioned here. I'll just add that the Alto's CPU spanned three circuit boards: an ALU board, a control board, and a control RAM (i.e. microcode) board. | |
| Feb 15, 2018 at 16:51 | comment | added | Jules | It's also worth noting that while the Alto was actually a relatively slow computer (0.3 MIPS, which is probably roughly comparable to a 1MHz 6502 e.g. Apple II / Commodore PET) this isn't because its CPU was that slow: the CPU was slowed down to 5.8MHz in order to run synchronously with its RAM. Without that limit: a look at the schematic suggests that the limiting critical path would be decode time on its microcode prom (50ns) + about 5 74S series gate delays (typically 3ns each) + either ALU delay (30ns) or register select delay (35ns), so I suspect it could have run at ~10MHz. | |
| May 29, 2017 at 14:50 | history | edited | wizzwizz4♦ | CC BY-SA 3.0 |
Improved formatting.
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| May 29, 2017 at 12:34 | review | Late answers | |||
| May 29, 2017 at 14:51 | |||||
| May 29, 2017 at 12:15 | history | answered | Klaws | CC BY-SA 3.0 |