Timeline for Why was the 1540 a computer in its own right?

Current License: CC BY-SA 4.0

5 events

when toggle format	what		by	license	comment
Jun 13 at 17:18	comment	added	supercat		The critical aspect of timing is that an `LDA XXXX / BPL *-3` loop needs to be able to grab a value that might be available for less than eight cycles. Replacing the universal shift register that's used for both input and output with a separate 74LS595 for input and a 74LS596 for output could have eased the timing to about 30 cycles, but losing 42 cycles for badlines would still have broken things.
Jun 13 at 17:03	comment	added	supercat		Using such an approach on the C64 would have required disabling interrupts and blanking the screen during disk access, but would have been perfectly workable given such constraints as evidenced by the fact that the Apple II actually works that way.
Jun 13 at 16:12	comment	added	Justme		@supercat IIRC, it's bit-banging the interface with the CPU. So the CPU has no time to do anything else than to sit in a loop while transferring data. Such thing would have been impossible on e.g. C64 - the tape is handled like that but the data rate is so slow it can be done with some help from the CIA when reading tape data. There would be no time to handle floppy data rates like that, especially with the VIC-II halting the processor for multiple cycles during the "bad lines" where it fills the internal buffers for next few video lines.
Jun 13 at 15:48	comment	added	supercat		The Apple Disk Controller II card has eight small DIP chips, none of which is actually a disk controller. I don't know what aspects if any were patented, but absent such issues the design could have been easily adapted to the VIC-20, in the same form factor as ordinary VIC-20 cartridges. While there are advantages to having floppy controllers interface with DMA, there's no actual requirement that they do so.
Jun 13 at 4:21	history	answered	Justme	CC BY-SA 4.0