Timeline for Were people building CPUs out of TTL logic prior to the 4004, 8080 and the 6800?
Current License: CC BY-SA 3.0
9 events
when toggle format | what | by | license | comment | |
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Mar 2, 2020 at 22:30 | comment | added | Grabul | Details are available in the original creator own website. It's fair to provide a link for those really interested, instead of copying content here. | |
Apr 27, 2018 at 1:57 | comment | added | CJ Dennis | I agree with @JAL. I'd be happy to upvote your answer if you provided more detail. | |
Jan 6, 2017 at 1:15 | vote | accept | hawkeye | ||
Jan 5, 2017 at 22:09 | comment | added | supercat | Any idea what other sizes of delay shift register were available, either static or dynamic? I would think it would be possible to double the speed of the machine if the program counter were stored in a 128-bit shift register, and bytes were stored in interleaved fashion. If the the longer shifter held address 000[octal], 010, 020, to 170, then 001, 011, 021, up to 171, etc. then instead of each instruction fetch requiring a full lap through the long shift register, eight fetches could be handled on each lap. | |
Jan 5, 2017 at 7:01 | comment | added | PkP | That's absolutely brilliant! I didn't realize so large delay line shift registers were available so early. That's a real computer, made from TTL chips. The complete schematics is in the Theory of Operation document from your link. kenbak-1.net/index_files/Theory%20of%20K-1.pdf . What a treat. Must investigate further. +1 from me. Cheers! | |
Jan 5, 2017 at 0:46 | comment | added | hawkeye | That's awesome! Can you add an explanation of what it is capable of? | |
Jan 4, 2017 at 21:42 | comment | added | JAL | Welcome to Retrocomputing! This is a borderline link-only answer. It would help future visitors if you edited your post to elaborate on the KENBAK-1 Computer. | |
Jan 4, 2017 at 21:36 | review | First posts | |||
Jan 4, 2017 at 21:42 | |||||
Jan 4, 2017 at 21:33 | history | answered | Grabul | CC BY-SA 3.0 |