The RGA bus is the bus that connects Agnus/Alice with Denise/Lisa and Paula.

What is it used for? I guess at a minimum to write/read registers in Denise/Lisa and Paula, and I guess to feed data to them.

Has it ever been documented?

  • You mean in more detail than that it's the ReGister Address bus and carries either FF to indicate no register is currently being addressed, or an actual register address? Like: who takes charge of it according to which operations, and with what timing?
    – Tommy
    Apr 23, 2017 at 22:47
  • Yes, if possible. Although I guess nobody ever got into that level of detail?
    – user180940
    Apr 24, 2017 at 15:19

2 Answers 2


The Amiga contains a general-purpose coprocessor within the Agnus/Alice custom chip known as the Copper. The Amiga Copper uses DMA and interleaved access to chip RAM shared with the 68k CPU to fetch and execute simple instructions. Mainly, the Copper's MOVE instruction is used to update the value of most any of the 3 custom chip's internal registers based on precise video timing and without intervention from the CPU.

A Copper MOVE instruction needs to be able to address the many custom chip registers to do this, and it does so using the register address (RGA) bus that is shared among all 3 custom chips. So, you can think of the Copper as a simple micro-processor that controls an 8-bit address bus and a 16-bit data bus, but which can also utilize DMA to access its program code residing in the shared chip RAM. Additionally, many of the custom chip registers control additional DMA functionality, thus allowing the Copper to synchronize many different system activities independently of the CPU.

The Amiga patent discusses the RGA bus specifically being an optimization to minimize the complexity of the custom chips and their interconnection. By using this approach, the chip designers created a powerful coprocessor capability around DMA control with a simplified shared bus requiring a minimum of logic and pins.

  • So is the RGA bus only used by the Copper? If the MC680x0 writes to a register in Paula of Denise, who puts the register address on the RGA bus?
    – user180940
    Apr 26, 2017 at 16:38
  • The RGA is "used" by all 3 custom chips for register selection. It can be "driven" by either the Copper or the CPU, such that either of them can access the registers. Custom chip registers appear in the CPU memory map starting at $DFF000.
    – Brian H
    Apr 26, 2017 at 21:16

RGA stands for ReGister Address. Agnus controls it together with the DRAM multiplexed address bus and the chips data bus. Examples:

  • CPU must read or write register N. Agnus puts N on RGA and connects the chips data bus with the CPU data bus
  • DMA channel must read or write location L on register N. Agnus puts L on DRAM address, N on RGA. DRAM data bus is the chip data bus, therefore the data goes from DRAM to register or vice versa depending on what control lines Agnus asserted.
  • Copper MOVE, this is similar to a DMA read except the N is the target register of the move and L is the second word of the move instruction.
  • Strobe. Sometimes the RGA is not the address of a real register but a magic register address number. Agnus use this to trigger some behavior on the other custom chips. E.g. vertical blank.
  • It's the last point that really interests me. The first three points basically just tell that the RGA bus is the decoded address of a chip set register, i.e. Agnus decodes the registers for Denise and Paula. The latter point however tells that it's at least partially delivering some state across the chipset.
    – user180940
    May 22, 2017 at 15:08

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