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I remember reading an article in a computer magazine around the year 2000 (most likely in the German c't magazine), about the different (planned?) 64-bit extensions for the x86 family. It had an article explaining Intel's design, and an article explaining AMD's design. As I was reading those articles, I remember thinking that AMD's design sounded much more straightforward and reasonable.

Fast forward a few years, and Intel did adopt AMD's 64-bit design, much to my surprise.

Now I wonder: Did Intel design their own 64-bit x86 extension and has ditched that in favour of AMD's design or do I misremember that? I'm somewhat sure that said article did not describe IA-64 (aka Itanium, a 64-bit only architecture), but instead a x86-compatible solution. The x86-64 Wikipedia article does not mention such a design, it only mentions that Intel had adopted AMD's design with a few minor differences.

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    courses.cs.washington.edu/courses/csep590/06au/projects/… seems pretty comprehensive and doesn't mention any third design besides IA-64 and AMD64. It does say that Intel was secretly working on an AMD64-compatible architecture as early as 2000, which eventually became known as EM64T and then Intel64, but it's basically the same as AMD64 with minor tweaks. Perhaps this is what you read about? Commented Oct 20 at 13:39
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    See: Tom R. Halfhill, "AMD and Intel Harmonize on 64." Microprocessor Report, March 29, 2004, pp. 1-8 (can be found it online if you Google for it). Intel basically adopted AMD's specifications in their entirety. Quote from the article: "In every case, we found that Intel had patterned its 64-bit x86 architecture after AMD64 in almost every detail".
    – njuffa
    Commented Oct 21 at 3:25
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    Maybe you are thinking about PAE (Physical Address Extension or Page Address Extension), which was a way for the OS (but not applications) to handle more than 4 GB of RAM? That required no changes to applications whatsoever, they continued to live on a "standard" 32-bit environment, but the OS could map each application to different parts of a 64-bit address space.
    – jcaron
    Commented Oct 21 at 12:58
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    Maybe combing through the c't archives will let you find what they were discussing?
    – jcaron
    Commented Oct 21 at 13:56
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    @jcaron I may be worth to note that AMD64 memory handling differs from PAE in that it uses a 4 level page table (instead of 3 with PAE).
    – Raffzahn
    Commented Oct 21 at 23:57

4 Answers 4

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TL;DR: No, Intel did not want x86-64, they had IA-64

The rest was FUD, power play by Microsoft and market reality.


Zac67's answer may point out some important confusion, except in my recollection there was a bit more to the story than confusion and Intel creating quite some hot air about countering AMD64 with their own design. Looking back, I'm not sure how much of that was true, but in the industry it was widely seen as such, and so did I. To understand it may help to take a look at the bigger picture:

Some History

Intel had done a very similar move just the year before by introducing SSE with the (Pentium III, 1999) to counter AMD's 3dNow! (K6-2, 1998), thus when AMD released their AMD64 (aka x86-64) spec in 2000, everyone was expecting intel to show off their own thing, ofc, not compatible to AMD, as with SSE before.

Previous extensions were usually only announced shortly before fitting Hardware (CPUs) were introduced. In contrast AMD64 was announced in 1999 and publicly documented in full in 2000, while first hardware (K8) took three more years until 2003 as Opteron in Spring and Athlon 64 right for Christmas 2003.

The Early Naughties (00..05)

It further helps to remember the over all time line, as Intel entered naughties shell shocked by AMD's superior 1999 K7/Athlon CPU line that clock for clock outperformed the Pentium III and reached higher clock rates at the same time. The Pentium III was still based on a 1995 Pentium Pro (P6) architecture. It wasn't until the 2007 core architecture that Intel regained ground with the Core design, the first really new architecture - no, the Pentium 4 was an utterly failure. Great on first sight, but deadly crippled when running real world loads. Also still a direct P6 offspring (thus named P68).

Enter Microsoft

Now add another major player to this 2000 to 2005 backdrop: Microsoft

It was the time that pushed very hard into the server market. They had just released Windows 2000 Server in 1999 and started to work on Windows Server 2003, intended to be a distinct, server first product (hence the name change). Windows 2003 was also posed to support IA-64, Intel's sole 64 bit product in form of the Itanium CPU. Adding AMD64 support was seen as a possible additional target, especially as it supports upward compatibility with acceptable performance - frankly, Intels IA-32 support on IA-64 sucked.

But MS did neither have capacity nor any intention to support two different 64 bit extensions for x86 at kernel level - which is the really important part here. Having a bunch of additional instructions at user level (think MMX or SSE) doesn't matter at all, while having more registers to save and restore are minor details usually covered by the most basic HAL-functions. But AMD64 not only introduced new 64 registers and addressing, but also a new memory management model, which at least requires adapting and hardening all modules touching virtual memory - which can be a lot. This is where the cost of two different 64 bit extensions for MS were and why they wanted to avoid them as much as possible.

Intel Dragging its Feet

While Intel was in 2000 still licking the Athlon wounds and pressing ahead with a firm commitment to IA-64, AMD delivered full AMD64 documentation in early 2000 and prototype hardware during 2002 to Microsoft. Everything a software developer could wish for. At that point Intel might have still convinced themself that it's a fast fading buzz. That is until AMD presented the Opteron 64 in April 2003 - right the same time as Microsoft premiered its Windows Server 2003. Of course shown off running at Opteron based servers - also the reason why the Opteron 64 was pulled before the Athlon 64.

Intel Being Dragged

And guess what? It was a success. Server operators saw the Opteron as a great way upward at a lower cost than IA-64. After all, they were faster and more cost efficient even without running a 64 bit OS.

So Intel seeing their customers going for faster and larger AMD64 servers instead of IA-64 (or more Pentium 4), needed a stop gap measure for their server business (Xeon). So a Pentium 4 variant supporting EMT64 was introduced a good year later in June 2004. (I believe there was also a Pentium 4 version shown at the Microsoft Server 2003 event capable of doing Intel64, but I can't find any evidence)

In fact, the exact timeline of AMD64 introduction with the Prescott line paints a good picture of that 'dragging'.

  • In February 2004 Intel introduced a Pentium 4 using the 90 nm Prescott core as Family 15 Model 3. This core did already was already fitted with Intel64, but disabled.
  • In June 2004 the Nocona based Xeon was offered with Intel64.
  • Finally in November 2004 the Prescott E0 Stepping was announced which now also enabled Intel64.

Part of this forth and back can be heared in David Cutlers 2023 recollection recorded 2023 by Dave's Garage, which Sebastian Koppehelt found.

Fudding Names

Originally Intel named the 'new' extension EM64T for Extended Memory 64 Technology, which nicely shows the whole reasoning behind adding it: the new Memory Management fitting what Microsoft implemented in Windows Server 2003 and the later High end Workstation Version Windows XP Professional x64 Edition (Not to be confused with the Itanium Version Windows XP 64-Bit Edition).

Now when those CPU finally arrived, Intel choose Intel64 as marketing name - obviously to counter AMD64 being mainly used. Over time public simply choose to call it x64 or likewise - today morphed into x86-64.

Conclusion

Intel had in 2000 no intentions to build a 64 bit x86. Their server focus (and that's what 64 bit was seen for) was at 100% IA-64 aka Itanium. They created a notable level of FUD - and maybe some half founded development as support - to stop AMD from gaining ground in server applications with their AMD64. Mostly felling how inefficient and dead end a 64 bit rucksack for a low end technology like IA-32 is.

Microsoft in turn was as well geared to IA-64 support in addition to 32 Bit x86 (IA-32). Supporting a 64 Bit x86 as well was fine to them. Except there was no time nor willingness to support two different 64 bit extensions. AMD delivered documentation early on and customer ready hardware right in time (2003) for Windows Server 2003 to shine. Intel could only react to jump onto the already rolling train. No room for any development of their own.

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    I had a slightly different story from a senior AMD person in 2005 or 2006. Once Intel accepted they had to do a 64-bit x86 they wanted to make it thoroughly incompatible with AMD64, with differently encoded instructions. The idea was to force software producers to produce separate Intel and AMD builds, in the hope that they would not bother with AMD versions and AMD would be forced out of the market. Microsoft said they couldn't prevent Intel doing that, but they would not produce Windows for it. Intel had to climb down. Commented Oct 20 at 22:30
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    @JohnDallman Yes, that's part of the story, except as I was told, their 'we do different' started way before accepting they had to. It was more an 'alternative offer' yeah, if you want it, we do it, but it'll be different. And all of that was mostly hot air, hoping to slow development down and make MS miss the deadline. But AMD delivered on their promises during that time to MS. It changed when they realized that Server 2003 will be delivered with AMD64 support and none of their non-finished proposals (Might also have helped that there were similarities with DEC Alpha (Thanks to Mr. Meyer :))
    – Raffzahn
    Commented Oct 20 at 23:24
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    today morphed into x86-64. - The term "x86-64" dates back to at least 2000, with discussion between AMD CPU architects and GCC / Linux kernel developers taking place on x86-64.org mailing lists (e.g. feedback from kernel devs led to syscall masking RFLAGS so interrupts could be disabled on kernel entry before swapgs). The wayback machine shows it existing as early as Aug 2000 under that name. So [citation needed] for MS's shortened x64 predating x86-64. Also the fact that the "public" chose to call it x64; that was AFAIK MS's doing. Commented Oct 21 at 4:23
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    "But MS did neither have capacity nor any intention to support two different 64 bit extensions for x86 at kernel level" - This implies IA-64 is a "64 bit extensions for x86", which it definitely is not.
    – marcelm
    Commented Oct 21 at 7:37
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    @TooTea: "MS could well have expected all existing 32-bit x86 deployments to migrate to whichever of IA-64 or AMD64 wins the battle," MS management might have expected that, but not engineering. The x86-32 hardware in Itanium and Merced was slow by the standards of the time, because it was strictly in-order. Anyone who switched from a Pentium Pro/II/III to the x86-32 on IA-64 would have seen major performance losses. The change in McKinley to transpiling into IA-64 native code improved matters, but it was still slower than any OoO x86 implementation. Commented Oct 21 at 12:51
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Even before Intel management saw which way the wind was blowing, Intel CPU architects had built "our own internal version of x86-64" into Pentium 4. This is from a Quora post by Bob Colwell, who was Intel's Chief x86 Architect before he retired in 2000, having worked on P6 (PPro through PIII) and Pentium 4.

Bob Colwell on Quora in 2023

Intel’s Pentium 4 had our own internal version of x86–64. But you could not use it: we were forced to “fuse it off”, meaning that even though the functionality was in there, it could not be exercised by a user. This was a marketing decision by Intel — they believed, probably rightly, that bringing out a new 64-bit feature in the x86 would be perceived as betting against their own native-64-bit Itanium, and might well severely damage Itanium’s chances. I was told, not once, but twice, that if I “didn’t stop yammering about the need to go 64-bits in x86 I’d be fired on the spot” and was directly ordered to take out that 64-bit stuff. I decided to split the difference, by leaving in the gates but fusing off the functionality. That way, if I was right about Itanium and what AMD would do, Intel could very quickly get back in the game with x86. As far as I’m concerned, that’s exactly what did happen.

This phrasing I highlighted suggests that Intel corporate management was (early on at least) solidly opposed to any 64-bit extension to x86.
(At that point, presumably in the late '90s before the first P4 release in Nov 2000, so well after the P7 project Eugene Styer's answer mentioned, cancelled in 1994 to focus on IA-64 as the 64-bit future.)

A few news articles like https://www.techspot.com/news/105222-intel-could-have-beaten-amd-x86-64-transition.html have been reporting on this in the last couple days as AMD engineer Phil Park found it while researching x86-64 history and quoted it on twitter

Anyway, Bob Colwell retired from Intel in 2000, well before 90nm Prescott / Nocona in 2004 was the first Intel 64 CPU. It takes a long time to get a CPU design from initial development to tape-out + release, but presumably he was talking about Willamette or at the latest Northwood (released 2002).

Initial Prescott steppings shipped with 64-bit support disabled for some reason. I don't think this is what Bob was talking about, though, since this was after AMD's x86-64 CPUs came to market and were eating their lunch. Nocona is the Xeon version of Prescott, and Intel loves to only enable some features in the same silicon when it's sold as a more expensive Xeon (server/workstation) instead of a less expensive client (desktop/laptop) CPU.


Prescott did significantly re-architect things, like widening the integer ALUs to two 32-bit stages instead of two 16-bit stages, allowing 64-bit integer addition. (But also increasing add eax, ecx latency from 0.5 cycles to 1 cycle it seems, see comments and answer on an SO question. A Chips & Cheese article on Prescott-era Netburst unfortunately doesn't discuss the ALU latencies.)

I'm curious how x86-64 on Willamette / Northwood would have worked. Maybe the adders were wider and their high halves are part of what got fused off? Or maybe 64-bit operand-size instructions would decode to 2 micro-ops?

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  • Given that they introduced SSE in 1999, and that supported a fair number of 64-bit operations, they might have routed at least some 64-bit integer instructions through those execution units. Commented Oct 25 at 1:14
  • @JerryCoffin: SSE1 was new in Pentium III and was just 32-bit float in XMM registers. (And a few new MMX instructions like pshufw / pavgb / pextrw on MMX registers). 64-bit integer paddq mm0, mm1 was new in Pentium-MMX and supported in P6-family in Pentium II which released in 1997. SSE2 was new with Pentium 4, adding 128-bit XMM versions of MMX instructions, and some new instructions. But it still had to support 64-bit MMX vectors. Commented Oct 25 at 1:57
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    @JerryCoffin: If you're talking about hypothetical early-Netburst 64-bit support, it probably used a separate register file for MMX than for GPRs; unlikely they'd burden the integer forwarding network with that. But I guess not impossible, and yeah maybe handling 64-bit add / shift with MMX ALUs with 2 cycle latency instead of 0.5 or 1 for normal integer instructions is barely plausible. (Willamette runs paddq mm, mm with 2c latency, SSE2 paddq xmm, xmm with 4c latency on a different execution port, fp instead of mmx according to agner.org/optimize/instruction_tables.pdf) Commented Oct 25 at 1:58
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Intel worked on a 64-bit extension to the Pentium prior to developing the Itanium, but the article does not indicate any details of the Intel design. AMD64 wasn't publicly announced until 1999, so I suspect that this is not the design the OP remembers.

From What’s Up With Willamette? (Part 1) (the Wikipedia article on the Itanium links to this article):

In early 1993 Intel’s Santa Clara processor design team had just finished off the P5 project (Pentium) and started work on the P7. . . . The P7 was a powerful 64-bit x86 compatible successor to the P6 envisioned to have around 20 million transistors or nearly four times as many as the Pentium Pro. In some ways Intel’s original P7 project conceptually resembles AMD’s K8 “sledgehammer”, the 64-bit successor to the K7 Athlon.

The P7 progressed only far along enough for Intel’s engineers to realize that extending x86 to 64 bits, and staying competitive with RISC processors, would be challenging to say the least. . . . In 1994 the Santa Clara team dropped all work on the 64 bit x86 processor design called P7 and started on the first implementation of the new IA-64 architecture arising from the Intel-HP alliance, a processor later known as Merced.

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    wow, interesting. They were right about "staying competitive with RISC processors, would be challenging" but had to do it anyway ¯_(ツ)_/¯ Commented Oct 21 at 16:04
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    @akostadinov I suspect it would have been more challenging with 1993 technology (when the article says the P7 programme started) than with 2004 technology (when Intel announced "Intel64"). The first Intel64 CPU had 125 million transistors, versus the transistor budget of 20 million for the P7 project.
    – James_pic
    Commented Oct 22 at 10:22
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You must be referring to either the IA-64 architecture used on the Itanium - an entirely new and incompatible ISA - or Intel 64 (initially Clackamas Technology/CT, then IA-32e or EM64T), Intel's adaptation of AMD64, an incremental approach from x86 or IA-32.

There are some differences between Intel 64 and AMD64, especially in lower-ring implementations, that the magazine might have explored (does sound like c't's Andreas Stiller). Together, AMD64 and Intel 64 are often referred to as x86-64.

That Intel worked on another 64-bit successor to x86 is not likely, or at least not in common knowledge - at least not at that time, when the Itanium had already been selected.

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    There are some differences, but a lot of the really core ring 0 (kernel mode) stuff is the same across AMD and Intel's versions of x86-64, such as page-table format (AMD extended the PAE format which Intel originally designed), control-register bits, some MSRs like the ones that control syscall entry point and masking of RFLAGS. What is the compatible subset of Intel's and AMD's x86-64 implementations? / What EXACTLY is the difference between intel's and amd's ISA, if any? Commented Oct 21 at 4:09
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    The kinda 64 bit i860 is always forgotten. Used in the NeXTCube graphics accelerator, for one. Very incompatible with the x86 branch, of course. Commented Oct 21 at 14:32
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    @DavidTonhofer That's why I used successor to x86 - I didn't forget. ;-)
    – Zac67
    Commented Oct 21 at 15:45
  • AFAIK these rings are just ring 0 and non-0 now for both Intel and AMD. The original meanings in 386 are lost. Commented Oct 21 at 16:02
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    @akostadinov: I'm pretty sure modern x86-64 CPUs still support ring 1 and ring 2, I think even in 64-bit long mode. Modern OSes only use ring 0 (kernel) and ring 3 (user-space). Part of the reason is that most OSes are portable to non-x86 ISAs which mostly only have user vs. supervisor, and the privilege separation built into rings 1 and 2 is mostly tied to segmentation not paging, IIRC. (So I'm not sure it even does much in 64-bit mode.) The classic use-case for rings 1 or 2 would be a microkernel which runs some drivers in those priv levels, but "privileged" insns are ring0-only. Commented Oct 21 at 18:19

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