##The Whole Life is a Tradeoff
As always in real life situation decisions must be made based on contradicting requirements. In this case optimal power supply and easy PCB design are an examples where both are good considerations but hinder each other.
##Consideration #1 PCB layout
For simple PCB design it's quite handy if supply power and ground are on oposite 'ends' of a chip (*1). Having one at the 'upper' end (where the mark is) and the other at the lower end (*2) allows a design with a power bar runing alond one side and a ground one along the other. With a little luck when routing and the usage of rails (*3) it may allow the use of single sided boards with a minimum of discrete wireing (jumpers) - or at least keep a design within two layers. Multiple rows of chips lead to a design with a pair power traces (or rails) runing along the middle as seen on many boards.
##Consideration #2 Power Supply Quality (Buffering Capacitor)
On the other hand, for a good power supply it's handy to have a right sized capacitor as close as possible (short routing/wires) to the power supply pins to buffer switching needs. As higher switching frequencies get, as more important this is. Placing power and ground at two adjacent pins would allow to add a capacitor right next to them.
Also, placing both of this pair near the middle of an edge further shortens the wire length as the internal part of these pins (which in turn are bonded to the die) are here the shortest of all.
Of course routing of power lines will now be a rather complex among all the signals. But still managable - especially when again using rail (*4).
##Ok, But Then Why Oposite?
It is desirable to have the same voltage between ground and power across the whole chip area (or as much as possible at least). Unlike simplified asumptions, semiconductor have a rather high resistance, about 10 to 1000 times of copper. Increased by the fact that conductivity is not only defined by the material, but also conducting diameter, power distribution across a chip becomes a serious issue (*5).
If power would be supplied by adjacent pins, the region where these pins are bonded in would enjoy full voltage, while the areas at the other 'end' would get a quite lower supply resulting at least in lower maximum performance if not worse. By placeing them on oposite sides of the die the voltage loss is somewhat compensated over most areas. None gets maximum voltage, but all get about the same (*6) which again is something easing circuit design of the chip.
Puting both on oposite positions (horizontal or diagonal) as seen with the Zilog chips (*7), but also TTLs or next to any other chip is therefore mandatory.
Bottom Line, Zilogs solution scales better with higher frequency and allows better signal quality but requires a little mor complex PCBs
*1 - At least for single voltage ones that is.
*2 - I doesn't matter if both are on the same side (left or right).
*3 - These are metal band with pins in regular intercals like .6 inch or alike. With rails a the routing of power can be eliminated for major parts of a PCB. This was even more important with early automatic routing systems removing a whole dimension of complexity.
*4 - Now standard .6" or 1" rails may not work as good, but it's still better than routing them among all the signals.
*5 - Thats also the reason why these huge modern chips have not just one or a few pairs of power pins but sometimes hundrets.
*6 - Yes, there is still variation due routing and so on, but it's by default way less than without this consideration.
*7 - The PIO breaks this a bit by using 11/26 instead of 11/29 in favour of keeping all Port B pins ajacent. A little variation doesn't kill the principle.