I am in particular interested in the differences between ARMv4 and ARMv7 (I have a particular task in mind), but to make this question more generally useful to future readers, I'll ask more generally about miscellaneous varieties of ARM.

I know that between various generations of ARM there have been various incompatibilities introduced here and there, things like 26-bit addressing changing to 32-bit addressing, and various execution modes, like FIQ and Thumb. There have of course also been changes to things like cache size and whatever, but I'm more interested in changes to the instruction set and other parts of the programming model. There have been extensions like Thumb2, and DSP-esque instructions in later chips.

But I can't seem to find an actual grid specifying what the changes to the ISA are between the generations.

So, between the ARMv1, ARMv2, ARMv3, ARMv4, ARMv4T, ARMv5TE, ARMv6, ARMv7, ARMv7E, which new instructions where introduced when? And if porting software from one to another, is there anything else I should know?

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    @Brian, but nowhere in those articles is there what the OP's asked for: an actual grid specifying what the changes to the ISA are between the generations.
    – TonyM
    Commented Oct 11, 2022 at 7:36
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    Hi @Brian, I did look through them before posting and there is no such grid (table). Those in there just give broad summaries. There's no table showing which instructions and addressing modes were added/removed from generation to generation, as changes to the ISA asks for. You wouldn't expect such detail in Wikipedia either, it'd be somewhere else.
    – TonyM
    Commented Oct 11, 2022 at 10:28
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    The ARM has a rather long list of instructions, so I'm not sure a simple grid would be visually effective. It's worse if you include all the add-ons (THUMB, THUMB2, ThumbEE / Jazelle, VFP, NEON) and variants (-A/-R/-M). For example, IIRC the ARMv7-R was the only variant with an integer divide instruction, so you can't simply list instructions for ARMv7 without throwing some asterisks in. What works in practice is to pick a baseline architecture (ARMv5TE, ARMv7-VFP) and target that, so your code works on that version and later versions.
    – fadden
    Commented Oct 11, 2022 at 14:44
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    @JohnDallman In answer to the question "What do [I] need it for?" I am working on this project, which generates code for various architectures. I am picturing that to get the most out of it, the user will need to have fine-grained control of code generation, a big part of which is obviously instruction selection Commented Oct 11, 2022 at 14:59

1 Answer 1


Unusual complexities

The project that prompted the question is equivalent to writing a compiler, but an unusual degree of control over the generated code is desired. You may find some of the information you need in the sources of GCC, GDB and the LLVM project, but you probably won't find all of it, which would mean you'd need to check that partial information against another source.

32-bit ARM architectures are rather complicated in this respect, having several instruction encodings. The modern cores also come in three "profiles", for processors intended for running Applications (-A suffix), embedded Microcontrollers (-M suffix) and embedded Realtime systems (-R suffix). The profile doesn't affect the instruction encoding, but it is something you have to understand to make sense of the documentation. Different cores within a profile can have different instruction timings, of course.

I looked at the reference manual for ARMv7-A and ARMv7-R, which is freely downloadable. It documents instruction availability on all the 32-bit ARM architectures. There are three encodings for many instructions (Thumb-1, Thumb-2, and ARM). However, it gets more complicated: there are "IT Blocks", prefix instructions that allow one to four Thumb-1 instructions following the prefix to be executed, or not, depending on condition codes. If you want to support ARMv7-M, which only supports Thumb instructions, that's another manual. While Thumb-2 is an extension of Thumb-1, there are cores that support Thumb-1 and Thumb-2, but leave out a few of each set of instructions, so you do need to keep track of both.

Since ThumbEE has been deprecated for over a decade and has been removed from ARMv8, I suggest you leave it out. I'd also suggest you leave out 26-bit addressing, which is long dead, and run-time selectable endianness, but those depend on how thorough you want to be.

Hit the Reference Manual(s)

I think you're going to have to compile your own tables. The reference manuals seem to have everything you need to do that. For example, I picked the ROR (register) instruction, more or less at random, to look at.


ROR (register) is available in ARMv4, all the variants of ARMv5T, all the variants of ARMv6, ARMv7-A and ARMv7-R.


ROR (register) is available in ARMv6T2, ARMv7-A and ARMv7-R.


ROR (register) is available in ARMv4, all the variants of ARMv5T, all the variants of ARMv6, ARMv7-A and ARMv7-R.

Confounding factors

The different ARM cores have varying instruction timings, and most of them (other than the earliest, and the smallest modern ones) have caches. That means the effective way to tell which instruction sequences are fastest is to run them on real hardware of the correct model. That's going to make using the OP's project a lot harder.


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