27

The Z80, one of the most successful and well-known of the 8-bit microprocessors, was released in July 1976 at an initial clock speed of 2.5 MHz.

The TRS-80 Model I, released the following year, is listed on https://en.wikipedia.org/wiki/TRS-80 as

CPU Zilog Z80 @ 1.774 MHz

In other words, significantly underclocked.

I am in later years used to the notion of CPU 'binning', i.e. each CPU out of the foundry is tested at a high clock speed, if it passes, then it is sold rated for that speed at the highest price, otherwise it is tested at a lower speed and if it passes, then it is sold at a lower price etc.

I'm not sure that applied in 1977. If it did, could underclocking the CPU have gained Tandy some benefit along the lines of 'we only need 1.774 MHz, so if you have some chips that work at that speed, even if they don't make your usual 2.5 MHz target, we will take them, for a lower price'?

7
  • 2
    Like @jwh20 answer, I am not specifically familiar with the TRS-80, but other systems of the era had clocks tied closely to video timings, so their point #2 is likely. Also, the Wikipedia article states that the Z-80 is clocked at 1.78MHz, not that the part is spec'ed at 1.78MHz, this is an important distinction. Do you know definitively whether the parts are marked 1.78MHz or are they faster parts and just clocked at that speed?
    – Glen Yates
    Commented Nov 16, 2022 at 21:55
  • 1
    @GlenYates Right, I think they are just clocked at that speed.
    – rwallace
    Commented Nov 16, 2022 at 23:38
  • 1
    @JonCuster 2.5 MHz was the lowest grade for the Z80 available. I guess Fagin did select that speed as starting point to be "better" than the (at he time) standard 2 MHz 8080.
    – Raffzahn
    Commented Nov 17, 2022 at 4:07
  • 1
    @RobbieGoodwin: Underclocking, especially combined with undervolting, has several advantages even with modern computing systems: (1) better performance/Watt (2) longer part lifetime due to lower temperature (3) quieter cooling systems
    – Ben Voigt
    Commented Nov 17, 2022 at 20:32
  • 1
    @RobbieGoodwin Those points re underclocking are true for modern (CMOS) parts, but the Z-80 was an NMOS part, so performance/watt didn't improve with slower clocking (I think it actually got worse, as it ran slower at the same current). And the TRS-80 had no active cooling (nor did it need any). It used Z-80s rated at 2.5 or 4 MHz (depending on date of mfr). As I recall the 1.77 MHz clock rate was indeed chosen to make video timing circuitry simple, as was obvious from looking at the schematics (surely online, somewhere.) Commented Nov 18, 2022 at 17:47

5 Answers 5

39

That would be a rather unusual move. The 2.5 MHz Z80 is well within Mostek's (*1) base technology of 1976 (*2). In fact, already the the very first mask set of 1976 yielded 20% good for 4 MHz (*3). So they they started with 2.5 MHz, higher than anything from Intel (*4) and introduced the 4 MHz Z80A as standard part in 1977. At the time the 2.5 MHz version became the marked-down (and soon discontinued) version (*5).

It's the RAM that wasn't up to speed. Tandy was a very early adaptor of DRAM - which at that time were not exactly fast. The basic Model I had 4 KiB using Mostek MK4096 RAMs. Of which only the fastest grade (-6) would be good for a 2.5 MHz clock, while 1.77 is about what a -11 needs to stay barely in spec. It would have been a strange move to design a low end priced computer for the most expensive RAM grade.

The expansion unit (and the later 16KiB model) used MK4116, which could go faster (~3 MHz), but at that point in time the basic speed was already set.


There were in fact a lot of modifications available to speed the machine up, except most wouldn't work with the 4KiB version. The most simple was changing the 74LS92, used in divide by 6 mode, or a 74LS90 in divide by 5 mode, resulting in 2.13 MHz operation. This worked on most Model I - in fact, Tandy did it as well for the Model III. Anything faster than that (and sometimes even that) resulted in an unstable machine unless wait states were added for memory access, effectively slowing it down by 50% again - so it needed the CPU to run at least at ~2.5 MHz to make it a bit faster than the basic 1.77. That's why next to all commercially available speedup included a wait state generator.

Of course the notoriously bad clock handling in the expansion unit made any speedup a gamble.


*1 - Mostek, not Zilog, produced the first Z80 processors. Zilog was a fabless company (p.3 and p.7 of Z80 oral history). It wasn't until a year later that they had a fab of their own, using their now parent company Exxon's money (p.19). From that point on Mostek was their first second source.

*2 - Mostek, like Synertek already used a depleted NMOS process allowing much higher speeds, which Intel shunned at the time - another reason why Faggin et.al. left Intel in the first place; they wanted to go ahead.

*3 - See p.12 of the Computer Museum's write up of the Z80 oral history.

*4 - At that time Intel offered the 8080 as 1.5 MHz and 2 MHz.

*5 - Not many non-letter Z80 found in collections :))

8
  • 1
    Did any mods add wait states to M1 cycles while leaving other cycles alone? Extending M1 reads to be as long as ordinary reads would almost double the time available for the DRAM to process an access, while increasing the cycle count of most programs by about 10-15%.
    – supercat
    Commented Nov 16, 2022 at 22:41
  • 1
    @supercat It's a Z80, not an 8080. The active memory portion during M1 is as long as any other, what you're thinking of is the 8080 timing, where instruction fetch (opcode) has an additional(!) cycle. For the Z80 that cycle is used for refresh handling, so no, no chance to save here.
    – Raffzahn
    Commented Nov 16, 2022 at 23:04
  • 1
    On the Z80, a complete M1 cycle takes two clock periods for a code fetch and two cycles for a refresh, while other accesses take three clock periods. If one subtracts out propagation time for /MReq and setup time for data, an M1 cycle leaves about one clock period for the RAM chip to fetch data, while an ordinary cycle leaves about two.
    – supercat
    Commented Nov 16, 2022 at 23:55
  • 1
    Essentially, in the absence of wait states, an M1 cycle combines a two-cycle read with a two-cycle refresh, while other cycles are three cycles. Adding a wait state to M1 would change it to a three-cycle read followed by a two-cycle refresh (since the refresh doesn't need to make data available to the Z80, output propagation of the memory chip and setup time for the Z80 can be ignored, so the refresh cycle probably wouldn't need to be extended.)
    – supercat
    Commented Nov 17, 2022 at 0:03
  • 1
    also problem probably was: if you change speed, all games become unplayable. Unless you have a "turbo" button that you can switch off/on Commented Nov 17, 2022 at 13:05
10

I'm not familiar with the specific design of the TRS-80 but there are at least two reasons I can think of that they may have used a 1.774 MHz clock vs. something else:

  1. They may have received a "deal" from Zilog for these lower-spec parts but generally the increase in yield going from 2.5 down to 1.774 would not have been all that significant. But it's possible.

  2. A more likely scenario based on what I do know of some other designs from that era that had integrated video, is that they wanted to sync the CPU and the video using the same clock and the 1.774 was the one that met the need. Such systems were often tied to multiples of NTSC and/or PAL video frequencies.

2
  • 4
    TRS80 CPU and video weren't synced - at least not the way #2 implies. This is something common with 6500 type CPUs which work at a fixed clock/memory access ratio. x80 style CPU have a varying clock to memory ratio due their instruction structure. Synchronisation has always to be done by halting video or CPU ... usually CPU. Which also is way less work as with a 6500.
    – Raffzahn
    Commented Nov 16, 2022 at 22:08
  • 3
    ZX Spectrum is almost an example of no. 2 here - except that AIUI, it was the availability of cheap crystals for PAL colour clocks that led to it running 4 MHz Z80 at 3½ MHz. Commented Nov 17, 2022 at 8:41
4

I can confirm that the TRS-80 Model I derived its CPU clock from the video timing chain, which was purely a cost-saving move. I modded my system with a 4 MHz CPU and a clock doubler of my own design. I didn’t add any wait states, so maybe I got lucky with the memory I was using.

The problem I ran into was disk access. The OS had NOPs to compensate for disk controller response time and doubling the clock halved that, of course. My solution was to detect disk access and temporarily downshift the clock until it ended. Worked flawlessly.

2

The speccy specifically divides down a 14MHz clock crystal to 7MHz for the pixel shift register, and then to 3.5MHz for the CPU, rated at 4MHz - as a trick to simplify the design. The earlier ZX80 and 81 used a 6.5MHz resonator for this purpose. Simplicity was the key. I suggest given the very specific frequency, that this is the same idea - dividing down by 2 again to get a CPU clock that the slower rated part can cope with.

1
  • 1
    Although this is interesting, it doesn't really answer the question that was asked (about yield). Commented Nov 24, 2022 at 14:44
1

Actually, underclocking is a modern term that doesn't apply to these early computer systems and wouldn't be used for them.

Underclocking and overclocking are adjustments that can be made to the processor and RAM clocks of modern systems, such as with PC motherboards. In such systems, the clocks for the processor, RAM, peripherals, interface buses and so on are loosely coupled to each other or, for peripherals, decoupled entirely.

In the early computers like the 1970s/1980s home computers, the microprocessor clock was tightly coupled to the operation of the RAM and the video display. That was to keep cost down and because other parts, like the RAM, actually were operating at full speed. The processor clock was often the highest attainable within those constraints.

'Underclocking' implies that there's an option to clock faster that hasn't been taken. Here, the microprocessor was no more 'underclocked' than the logic ICs were being 'underspeeded' because they could go faster or the connectors 'undercurrented'.

You must log in to answer this question.

Not the answer you're looking for? Browse other questions tagged .