GBA reading 16-bit values (or instructions) from 32-bit bus

Question

The GBA has various memory sections (e.g. IWRAM, EWRAM, ROM, etc), each with a bus width of either 16 bits or 32 bits. To my knowledge, the ARM7TDMI lacks any cache. When the CPU fetches 16-bit values from a section with a 32-bit bus (e.g. Thumb instructions from IWRAM), would it fetch from memory twice if it were reading half of a word right after reading the other half?

Answer 1

The GBA has various memory sections (e.g. IWRAM, EWRAM, ROM, etc), each with a bus width of either 16 bits or 32 bits.

Of these only IWRAM (Internal Work RAM) is 32 bit wide. It's located on-chip, tight coupled with the CPUs and able to deliver a word within a single cycle.

To my knowledge, the ARM7TDMI lacks any cache.

It may be useful to keep in mind that ARM7TDMI is only a logical definition of a core. Its actual interface items, like memory buffers for management of 16/32 bit access, are implementation dependent - even more so when part of an ASIC like with the GBA. Items like

When the CPU fetches 16-bit values from a section with a 32-bit bus (e.g. Thumb instructions from IWRAM), would it fetch from memory twice if it were reading half of a word right after reading the other half?

This is only marginal part of the CPU, but handled by the memory interface.

More important: It does not matter.

The IWRAM, as only 32 bit wide memory,

• is able to deliver a word within a single cycle.
• Any single access will need at least a single cycle.
• Any instruction accessing memory can do so within one cycle.
• Executing two consecutive 16 bit accesses will always take two cycles.
• Any ability to deliver two 16 bit words in one cycle can thus be not used.