Actually, unless there are actual design notes from WDC available, the question is really one too long for the title field: "What, precisely, are the disadvantages of having a version of the WDC 65816 with a 16-bit data bus and/or non-multiplexed address bus as compared to the advantages those would give?"
All (non-soft¹) versions of the WDC 65816 that I'm aware of have an
external interface with an 8-bit data bus and the top 8 bits of the
address bus multiplexed on the data bus pins. Thus, two cycles are
required for 16-bit data accesses (e.g.,
LDA with the
m bit set)
and external logic is required to latch the top 8 bits of the address
lines which also may introduce additional timing constraints.
This does allow the chip to fit into a 40-pin package, which seems like a reasonable option to make available, but that doesn't preclude also having a version in a larger package. Four years earlier the Motorola 68000 was first made available in a 64-pin DIP package with separate 24-bit address and 16-bit data buses, so the technology to do this at reasonable cost had long been available. And since then, of course, many other high-pin-count packagings have become common, yet even now WDC offers nothing larger than 44 pin (PLCC and QFP) packages.
Nor does a 40-pin package preclude having a full 16-bit external data bus, as the Intel 8086 did, with its 16-bit external data bus multiplexed on to the 20 bit external address bus. This need not even mean that separate 8- and 16-bit data bus versions need to be manufactured: in 1990 Motorola replaced the MC68008 (a 68000 with an 8-bit external data bus) with the MC68HC001, which allowed selection of external data bus width at reset.
So why the lack, even to this day, of "full 16-bit" external interfaces, as offered by other early 16-bit CPU vendors? What disadvantages to the various forms of the full 16-bit external interfaces am I missing?
¹I.e., chips you can buy off the shelf, as opposed to FPGA or ASIC cores you can integrate yourself into any package you like.