How did the Z80 instruction set differ from the 8080?

Question

The Zilog Z80 microprocessor, known for its use in the ZX Spectrum, was designed to be a backwards-compatible extension to the Intel 8080 processor. It introduced several new instructions to the 8080's instruction set, as well as adding or extending registers.

But, as those of us who've used undocumented opcodes know, you can never add without taking. Every change breaks someone's workflow program. So what are the differences between the instruction sets of these two "compatible" chips?

Answer 1

For the most part the Z-80 extends the 8080 instruction set. If we consider just the 8080 instructions themselves there are a few incompatibilities:

1. Overflow flag. On the 8080 bit 2 of the flags register only reports the parity of the accumulator after an ALU operation. On the Z-80 it reports parity for logical operations and overflow for arithmetic operations.
2. Half carry. RLC, RLCA, RL and RLA clear the half-carry flag on the Z-80 while the 8080 leaves it unchanged.
3. Other flag bits. The Z-80 adds the N flag which records whether the last arithmetic operation was an add or subtract (and is use by the DAA instruction). The Z-80 preserves all flag bits so the flags register can take on any value after a POP AF. The 8080 always sets unused flag bits to 1.
4. Instruction timings. Incrementing or decrementing a register pair takes 6 cycles on the Z-80, 5 on the 8080. Inc/dec of a single register is 4 cycles on the Z-80, 5 on the 8080 (or for (HL) 11 versus 10). ADD HL,rp is 11 on the Z-80, 10 on the 8080. Loading an 8 bit register from another is 4 on the Z-80, 5 on the 8080, but 8 bit load/store on (HL) is still 7 on both. A conditional CALL not-taken is 10 on the Z-80, 11 on the 8080. ex sp,(hl) is 19 on the Z-80, 18 on the 8080. jp (hl) is 4 on the Z-80, 5 on the 8080. ex de,hl is 4 on the Z-80, 5 on the 8080. ld sp,hl is 6 on the Z-80, 5 on the 8080.
5. DAA. On the 8080 this only works after addition (as it lacks the N flag to tell the difference). It may also differ when given unusual inputs.

Most of the additional Z-80 opcodes are prefixed by bytes CB, DD, ED and FD which the 8080 treats as aliases for other instructions.

The CB series are shift, rotate and bit test instructions: RLC, RRC, RL, RR, SLA, SRA, SRL, BIT, SET, RES and the undocumented SL1.

The DD and FD series are used for any operations on the IX and IY registers respectively.

The ED series are a mixed set of extensions prominently featuring the block move instructions:

IN r,(C)
OUT (C),r
SBC HL,rp
ADC HL,rp
LD (nn),rp
LD rp,(nn)
NEG
RETN
IM 0/1/2
LD I,A
LD A,I
LD R,A
LD A,R
RETI
RRD
RLD
LDI
LDIR
LDD
LDDR
CPI
CPIR
CPD
CPDR
INI
INIR
IND
INDR
OUTI
OTIR
OUTD
OTDR

Note that RLC, RLCA, RRC, RRCA are single opcode instructions shared by both. Similarly, both have a single opcode LD HL,(nn) and LD (nn),HL while only the Z-80 has the redundant ED version of LD HL,(nn) and LD (nn),HL.

Finally, the Z-80 has several new single-byte opcodes:

08   EX AF,AF'
10   DJNZ
18   JR off
20   JR NZ,off
28   JR Z,off
30   JR NC,off
38   JR C,off
D9   EXX

The Z-80 does not have a new JP instruction that tests the overflow flag. This remains the conditional jump based on parity but the "parity" bit is set based on overflow for arithmetic instructions. It just looks that way because Z-80 assemblers accept both JP PO,JP PE and JP V,JP NV, to allow the programmer to express intent.

The 8085 processor extends the 8080 instruction set with entirely different single-byte opcodes.

A good handful of the new Z-80 instructions deal with new interrupt handling modes. If you're looking to port Z-80 code to 8080 there is a relatively short list of things to watch out for:

1. Any use of IX, IY, AF', BC', DE', HL'
2. Auto-increment/decrement instructions like LDI, LDIR.
3. Relative jumps
4. Bit test/set/reset and shifts. Rotates on any register but A.
5. 16 bit add with carry or subtract with carry.
6. Use of overflow (generally uncommon)

Answer 2

This document calls out some differences:

http://www.msxarchive.nl/pub/msx/mirrors/hanso/datasheets/chipsz80leventhal3.pdf

1. Z80 uses P flag for 2's complement overflow, where 8080 does not
2. DAA instruction corrects both subtraction as well as addition on Z80, but addition only on 8080.
3. Z80 rotate instructions clear the A_C flag, but the 8080 does not.

Also, timings are different per-instruction.