For the most part the Z-80 extends the 8080 instruction set. If we consider just the 8080 instructions themselves there are a few incompatibilities:
- Overflow flag. On the 8080 bit 2 of the flags register only reports the parity of the accumulator after an ALU operation. On the Z-80 it reports parity for logical operations and overflow for arithmetic operations.
- Half carry.
RLA clear the half-carry flag on the Z-80 while the 8080 leaves it unchanged.
- Other flag bits. The Z-80 adds the N flag which records whether the last arithmetic operation was an add or subtract (and is use by the
DAA instruction). The Z-80 preserves all flag bits so the flags register can take on any value after a
POP AF. The 8080 always sets unused flag bits to 1.
- Instruction timings. Incrementing or decrementing a register pair takes 6 cycles on the Z-80, 5 on the 8080. Inc/dec of a single register is 4 cycles on the Z-80, 5 on the 8080 (or for (HL) 11 versus 10).
ADD HL,rp is 11 on the Z-80, 10 on the 8080. Loading an 8 bit register from another is 4 on the Z-80, 5 on the 8080, but 8 bit load/store on (HL) is still 7 on both. A conditional
CALL not-taken is 10 on the Z-80, 11 on the 8080.
ex sp,(hl) is 19 on the Z-80, 18 on the 8080.
jp (hl) is 4 on the Z-80, 5 on the 8080.
ex de,hl is 4 on the Z-80, 5 on the 8080.
ld sp,hl is 6 on the Z-80, 5 on the 8080.
DAA. On the 8080 this only works after addition (as it lacks the
N flag to tell the difference). It may also differ when given unusual inputs.
Most of the additional Z-80 opcodes are prefixed by bytes
FD which the 8080 treats as aliases for other instructions.
CB series are shift, rotate and bit test instructions:
RES and the undocumented
FD series are used for any operations on the
IY registers respectively.
ED series are a mixed set of extensions prominently featuring the block move instructions:
RRCA are single opcode instructions shared by both. Similarly, both have a single opcode
LD HL,(nn) and
LD (nn),HL while only the Z-80 has the redundant
ED version of
LD HL,(nn) and
Finally, the Z-80 has several new single-byte opcodes:
08 EX AF,AF'
18 JR off
20 JR NZ,off
28 JR Z,off
30 JR NC,off
38 JR C,off
The Z-80 does not have a new
JP instruction that tests the overflow flag. This remains the conditional jump based on parity but the "parity" bit is set based on overflow for arithmetic instructions. It just looks that way because Z-80 assemblers accept both
JP PE and
JP NV, to allow the programmer to express intent.
The 8085 processor extends the 8080 instruction set with entirely different single-byte opcodes.
A good handful of the new Z-80 instructions deal with new interrupt handling modes. If you're looking to port Z-80 code to 8080 there is a relatively short list of things to watch out for:
- Any use of
- Auto-increment/decrement instructions like
- Relative jumps
- Bit test/set/reset and shifts. Rotates on any register but
- 16 bit add with carry or subtract with carry.
- Use of overflow (generally uncommon)