Search Results
Search type | Search syntax |
---|---|
Tags | [tag] |
Exact | "words here" |
Author |
user:1234 user:me (yours) |
Score |
score:3 (3+) score:0 (none) |
Answers |
answers:3 (3+) answers:0 (none) isaccepted:yes hasaccepted:no inquestion:1234 |
Views | views:250 |
Code | code:"if (foo != bar)" |
Sections |
title:apples body:"apples oranges" |
URL | url:"*.example.com" |
Saves | in:saves |
Status |
closed:yes duplicate:no migrated:no wiki:no |
Types |
is:question is:answer |
Exclude |
-[tag] -apples |
For more details on advanced search visit our help page |
The Intel x86 family of architectures in general. Contemporary systems are OFF-TOPIC! Use the specific architecture’s tag if applicable.
10
votes
Accepted
The NexGen's x86 internal RISC architecture
Did the concept originate from NexGen or was it already being used in other non-x86 CISC processors?
In principle the whole translation idea isn't much different from classic micro programming. …
8
votes
Can an x86 CPU running in real mode be considered to be basically an 8086 CPU?
When an x86 CPU is running in real mode, can it be considered to be basically an 8086 CPU (or maybe 8088)? … So a x86 isn't the same but for most parts (and depending on the CPU used) a compatible superset of an 8086.
*1 - Lets ignore 'external' hardware differences for this. …
6
votes
x86 memory alignment
How has alignment changed with later processors, particularly with the introduction of 80386 and x86-64? … Does byte/word/double word/quad word alignment versus misalignment have any latency differences on later x86 processors? …
16
votes
x86 as a Pascal Machine?
Is there any good write up of "and so on" or historic Intel literature which talks about the relationship of x86 to Pascal?
As there is no special relationship to Pascal, No. …
5
votes
What was the first x86 CPU to use a cache of any kind?
(Regarding 80286 and in addition to Stephen's Answers)
While the 286 didn't have an on chip cache, some high end machines did add one. Similar for accelerator boards for 8088 PCs.
The issue here is …
14
votes
Creating 8086 binary larger than 64 KiB using NASM or any other assembler
DW OFFSET FARCALL-200 ; Offset in Segment
DW 0+20 ; Segment
HLT
FARCALL:
RETF
FARJMP:
HLT
FAR CALL/JMP are straightforward on x86 …
15
votes
First x86 Software Development Manual
It started out as a single manual covering hard and software, the
The 8086 Family User's Manual.
Before that there were only data sheets and manuals about single components, software tools and devel …
1
vote
Undocumented instructions in x86 CPU prior to 80386?
These opcodes are "not used" on 8086/8088 according to this manual: [...] but the meaning of "not used" is unclear [...]
Err... what of 'not used' is unclear? For a CPU, its manual is holy scripture …
11
votes
Accepted
Do all Intel Celeron processors support "FCOMIP"?
Short Answer: Yes.
Celeron is a sales name, and does not specify a CPU architecture or instruction set.
Having said that, FCOMIP was introduced with the P6 Family, so essentially with the Pentium PR …
39
votes
What does the "x" in "x86" represent?
x is meant as wildcard, so this represents all CPUs able to run 8086 compatible code.
7
votes
Accepted
How does an 8086 CPU remember the memory address where it should write back the operation’s ...
[Preface: This is a generic CS question, not really 8086specific, and should be moved over to SE]
TL;DR:
How microprocessor knows that memory address (BX + SI + 5FFDH) to send [BX + SI + 5FFDH] + EAB …
16
votes
In x86 real mode, how does BIOS know what hardware is present?
However, BIOS lived in a ROM.
No, but....
Step 1: DOS-BIOS != ROM-BIOS
BIOS, as seen by DOS comes from DISK and is loaded with DOS. OEM users had to provide their BIOS as loadable code. A DOS capabl …
25
votes
What was the last x86 processor that didn't have a microcode layer?
What was the last x86 processor that was hard-wired and wasn't actually a CISC implementation on a RISC core? … Except, all of that is hard to sell to non techies, in contrast, telling that x86 now incorporates the buzz of the day (which RISC was) is an easy one. …
0
votes
What is the best way to set up multiple operating systems on a retro PC?
so that I can have multiple "instances" of old operating systems
The main issue here might be that not al old OS can easy coexist with each other. It's usually possible as newer they get, but some ( …
5
votes
How is the ‘Coprocessor segment overrun’ exception supposed to be handled?
The Intel 80386 CPU [...] use[d] either a 80287 or 80387 as an external FPU. When the x87 FPU accesses memory,
No, unlike the 8087 which was a real coprocessor, 287 and later are I/O devices. They d …