Most of the reference material for the Apple II that I have seen refers to the 4116 RAM chip which held 16x1 kbit. This provided 16, 32 or 48 KB in banks of 8 chips. The Apple II motherboard layout seems to confirm this.
However, early Apple II material refers to 4 KB, 8 KB, 12 KB and other memory sizes. Did this actually exist? How was it implemented?
Most of the reference material for the Apple II that I have seen refers to the 4116 RAM chip which held 16x1 kbit.
Jup, at the time the Apple II really took off, 4116 chips had already dropped to less than twice the price of 4104, making any use of 4104 impractical. Not many were delivered using 4104, and while some users may have had 4104, they all soon replaced them by 4116, thus it's highly unlikely to find any Apple II board with 4104.
The Apple II motherboard layout seems to confirm this.
Depends on what motherboard you look at. Only newer are tied to 4116 usage.
However, early Apple II material refers to 4 KB, 8 KB, 12 KB and other memory sizes.
Yes (*1).
Did this actually exist?
Yes. All boards before the II+ were made that way, see below.
How was it implemented?
The first series of the original II board had one 16-pin DIL socked for each of the RAM rows (*2), made to 'jumper' for 4 or 16 Ki DRAM use. Here a premade block with wiring for either type could be placed, according to what chips were used. The blocks connected the necessary lines to switch CS0 (4104) and A6 (4116) as well address select lines to make RAM continuous.
The top row of this beautiful board pictured features three blocks for 16 Ki usage:
(Taken from this interesting project page)
Later production runs (of the original board) had the 16 Ki version of these blocks directly soldered to the board, so only 4116 could be used. With newer board revisions the whole blocks were dropped and replaced by fixed wiring, allowing only 4116 to be used.
A look at the original schematics shows these blocks (left of the RAM area) as well as a pinout of 4104 vs 4116 (direct below RAM area)
*1 - Valid memory combinations were
4/ 8/12 KiB with only 4104
16/20/24 KiB with 1 row 4116 and 0/1/2 rows of 4104
32/36 KiB with 2 rows 4116 and 0/1 row of 4104
48 KiB with 3 rows 4116
Anything above needed RAM cards and memory switching - the 16 KiB Language Card being the granddaddy of all of them.
*2 - At position D1/E1/F1 - basically shifted one row up from the RAM row (C/D/E) they configured.
The following information comes mainly from pages 70-72 of the Apple II Reference Manual, 1979 edition.
The Apple II had three rows of eight sockets for DRAM: rows C through E from front to back. Each row could accept either 4116 16Kbit×1 or 4104 4Kbit×1 DRAM chips.
Each row also had next to it a DIP socket for a 14-pin "memory configuration block" that contained three jumper wires that would set the DRAM chip sizes and locations of the rows in that Apple II's memory map. All three blocks must have the same pairs of pins connected or Weird Things will happen. (What exactly those Weird Things are would be the topic of another question.)
The memory configuration blocks were normally supplied by Apple (when
you bought the system or when you bought more RAM from Apple), and
there were nine configurations for which Apple supplied configuration
blocks, each of which gave contiguous memory from address $0000 up
to the top of RAM:
Total Row C Row D Row E
48K 16K 16K 16K
36K 16K 16K 4K
32K 16K 16K -
24K 16K 4K 4K
20K 16K 4K -
16K 16K - -
12K 4K 4K 4K
8K 4K 4K -
4K 4K - -
However, Apple also gives the details of the configuration blocks, which allowed you to create your own non-contiguous mappings if you wished. Typically this was used to allow you to map memory into the high-resolution screen buffer memory areas if you didn't have enough memory for a contiguous map to include those, as described at apple2history.org:
The first 4K of memory always had to have RAM present, since it was used by the 6502 processor, the ROM routines, and the text screen display. If, for example, you only had two other [rows of] 4K RAM chips to install and you wanted to display hi-res graphics, you could strap one [row of] chip[s] to the lower half of hi-res memory from $2000-$2FFF, and the other to the upper half of hi-res memory from $3000-$3FFF.
The configuration blocks had three pins, 14, 13 and 12, for rows C, D and E, and each of these should be connected to another pin indicating the size and starting memory address to which the row would be mapped:
Pin Size Start Pin Size Start
1 4K $0000 6 4K $5000
2 4K $1000 7 4K $8000
3 4K $2000 8 16K $0000
4 4K $3000 9 16K $4000
5 4K $4000 10 16K $8000
The manual mentions that:
If a row contains eight chips of the 16K variety, then you should connect a jumper wire from the pin corresponding to that row to a pin corresponding to a 16K range of memory. Similarly, if a row contains eight 4K chips, you should connect a jumper wire from the pin for that row to a pin corresponding to a 4K range of memory. You should never put 4K chips in a row strapped for 16K, or vice versa. It is also not advisable to leave a row unstrapped, or to strap two rows into the same range of memory.
The manual goes on to give the example of mapping 4K of RAM starting
at page 0 and two more 4K blocks covering the high-res screen buffer
at location $2000, as described in the apple2history.org quote
above.
The manual also mentions that Revision 0 boards have a bug mirroring
the 8K range at $4000 at $6000, regardless of whether the latter
contains memory or not. This was fixed in the revision 1 boards.
Original Apple II Rev 0 with 4K memory select blocks and 4K memory chips also pictured is an original Datanetics keyboard.
