The Z8000 was Zilog's entry in the 16-bit microprocessor market; it was unsuccessful in large part, as I understand it, because it took too long to debug. According to https://thechipletter.substack.com/p/captain-zilog-crushed-the-story-of

One key implementation decision was that the Z8000 would not make use of microcode.

Okay. That can be a good decision, if you also keep the instruction set very simple and streamlined; though I had not had the impression the Z8000 was a RISC.

Intel had also decided on an implementation that used microcode. The 8086 needed more transistors (more than 50% more than the Z8000) for a less impressive design.

Hmm! That does sound like a RISC Z8000, contrary to the impression I previously had.


... huh??

It's one thing putting multiply and divide instructions in a microprocessor, even in the seventies, if you are using microcode.

It's another thing altogether to do so without microcode!

Are all of the above claims correct? if so, how did the Z8000 manage to end up with fewer transistors than the 8086?

  • 4
    The technical manual (bitsavers.org/components/zilog/z8000/Z8000Tech.pdf) strongly suggests that it does looping, at least on the Long Word multiply where the execution times depend on the number of bits equal to one in the destination operand (oddly enough). Whether you consider that 'microcode' or not...
    – Jon Custer
    May 23, 2023 at 15:28
  • 2
    Indeed, I agree. Not finding anything else of relevance in other Z8000 documentation though...
    – Jon Custer
    May 23, 2023 at 15:34
  • 3
    Yes - if you have a bunch of complex instructions to implement - you amortize the microcode store+engine over them. But if you've got only two - both (complex) arithmetic instructions that basically need stuff you've already got like shifts/add/subract/compare and a counter or two plus some random logic - maybe then random logic suffices at a lower transistor count.
    – davidbak
    May 23, 2023 at 16:02
  • 2
    So they nanocoded the multiply/divide without microcoding the rest.
    – Jon Custer
    May 23, 2023 at 16:49
  • 2
    @njuffa, a dedicated mul/div can be built more simply without an FSM (finite state machine). A counter, and a 'run' flip-flop plus a small handful of gates can control the mul/div's shift register and add/subtract logic. I've built them in VHDL for FPGAs. And using that relatively tiny control circuit would be worthwhile to keep the overhead of microcode out of it.
    – TonyM
    May 23, 2023 at 18:34


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