Questions tagged [addressing]

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15 votes
2 answers
1k views

Why is the addressing mode for BRK defined as "stack" in the W65C02S datasheet?

I most online documentation, I find the addressing mode for BRK to be "implied", which is logical. In the W65C02S datasheet however, it is set as "stack": Is there some reasoning ...
Bart Friederichs's user avatar
18 votes
2 answers
3k views

Why was there a need for separate I/O address space in addition to a memory address space already?

I was reading through PCI and PCIe configuration access mechanism in Chapter 3 (page 96) of PCIe System Architecture (Mindshare series). As a solution to prevent locking (in case of multiple threads) ...
analogkp's user avatar
  • 183
12 votes
1 answer
988 views

Carry handling during address generation on a 6502

I'm trying to learn a bit more about the internal workings of the 6502. The manual says that the branch instructions do not affect the carry flag. However, my understanding is that some carry handling ...
Patrick LeBoutillier's user avatar
6 votes
1 answer
627 views

Why did the 8085 multiplex data with the low address byte?

Intel’s 8085 used bus multiplexing to stuff more functionality into 40 pins than would otherwise be possible. One of those pins, ALE, signals when the AD0…7 pins are outputting the low byte of the ...
Jacob Krall's user avatar
  • 2,299
4 votes
2 answers
390 views

How does the serial port on the RC2014 get addressed?

I see on the schematic that /M1 and A7 go to CS0 and CS1 respectively. As I recall, both of these need to be high for the chip to be selected. And A6 goes to CS2, which needs to be low for the chip to ...
Omar and Lorraine's user avatar
1 vote
2 answers
349 views

8086 assembly relative addressing issue [closed]

This tiny program puts a few A's into the text mode buffer of an ms-dos pc. But only works if the number of repetitions (CX) is loaded with a direct value. If I try to read that from memory, i.e. ...
Dercsár's user avatar
  • 685