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The Intel x86 family of architectures in general. Contemporary systems are OFF-TOPIC! Use the specific architecture’s tag if applicable.
11
votes
Accepted
x86 memory alignment
A modern X86-64 would not be retro any more. …
6
votes
Creating 8086 binary larger than 64 KiB using NASM or any other assembler
Making far calls/jumps to far absolute addresses or via pointer to far absolute addresses is not that hard if you know what the address will be beforehand or you can adjust the addresses based on wher …
3
votes
What does the "x" in "x86" represent?
It just means any processor compatible with same architecture.
So it includes 8088, 8086, 80186, 80286, 80386, 80486, Pentium, etc..
13
votes
In x86 real mode, how does BIOS know what hardware is present?
BIOS initially did not support hard drives at all.
Later on hard drive interfaces existed which had onboard ROM to replace the original implementation of BIOS disk interface to support that specific i …
8
votes
Accepted
Did PCs ever actually have a halt instruction?
The x86 CPUs has had a HLT instruction ever since 8088. So it's the CPU tha halts, not a PC or anything else around the CPU, be it in a PC or any other type of computer. … In short, there cannot be a single x86 CPU instruction that would blank a display in a PC. …
15
votes
Why does the x86 not have an instruction to obtain its instruction pointer?
On 8086 the instruction pointer is not a general purpose register you can freely access for reading. On earlier 808x models this was also the case, even though program counter was directly used to fet …
15
votes
If a PS/2 device on a 32-bit x86 sends a byte to the IO port 0x60 and you read it, what happ...
There is not only one place in memory, and it is not even memory.
The port 0x60 is an IO port in the CPU IO address space for accessing the keyboard controller data port. It is used to access a lot of …
22
votes
Why did x86 support self-modifying code in the 80s and 90s?
And it was already more complex to do self-modifying code on x86 CPUs than on many other CPUs, due to the memory being read into a prefetch queue first before executing the code from prefetch queue. …
11
votes
How can a 32-bit x86 CPU start with reset vector 0xFFFFFFF0 even though it starts in 16-bit ...
All x86 CPUs so far start in real mode where it is in a mode that is compatible with the code and memory model of 8086/8088. …
1
vote
Chaining IRQs in x86 ROM code
One solution would be to not use JMP to old vector, but CALL. Another solution is to use INT and store old vector to interrupt table.
NewVector:
PUSH DS
PUSH AX
MOV AX, 40h
MOV DS, AX
; do stuff here …
11
votes
Is it possible to detect a CGA card on an IBM PC 5150 by write/reading the Motorola 6845?
If all the other adapters have already been detected to be absent from the system, the possible options are that there are no MDA or CGA adapter at all, there is either MDA or CGA adapter installed, o …
46
votes
Why can't I invoke the next interrupt service by incrementing the AX register after calling ...
When calling the mouse driver interrupt with AX = 0, it returns 0xFFFF in AX if a mouse driver is installed.
So if it is installed, the code with INC AX will increment AX back to 0 and then it will ju …