19

This is explained in “Add a trap vector for unimplemented 6502 opcodes” by Carl W. Moser, published in Dr. Dobb’s Journal volume 4, page 32 (page 42 in the PDF; this is linked from the Wikipedia article on the 6502). The 6502 outputs a sync pulse on pin 7 whenever it reads an opcode, but not when it’s reading anything else (the second or third bytes of an ...


12

According to an Intel document describing opcodes which don’t result in exception 6, The 0F1H opcode is a prefix which performs no function. It counts like any other prefix towards the maximum instruction length. No restrictions apply to its execution. The same document mentions explicitly when opcodes are aliases for others. I interpret the above as ...


12

Are you using an enhanced //e? If so you'll need to get a patched copy, or copy and patch yours. The original (non-remake) Apple II version uses an undocumented 6502 opcode in the space flight code. This makes it impossible to hit the alien ships when running on a 65C02. The fix is in file "FGT3". Change the bytes at 74D1 to 46 43 45 43 (all hex).


9

Yes. In fact, it is a very simple system in machine language terms. The key to understanding the system is to look at the physical construction of the part you saw. This is what we would today would call the accumulator. It holds a single mathematical value. You can see it consists primarily of several vertical rods with gears spaced out along them. Each ...


8

To my knowledge, the NES and the Famicom had the exact same CPU (a Ricoh 2A03). So, it's unlikely there were any differences in behavior between the two with regards to undocumented opcodes. As the Ricoh had a 6502 core, you could also expect it has the same undocumented opcodes as the 6502 (not your question, though) - And this document seems to confirm ...


8

While it is officially documented as "a prefix which performs no function", a thread on the vcfed.org forums has discovered it is an ICE-mode prefix that forces the instruction's memory access to be performed using the normal bus pins instead of the extra pins normally used by the bond-out version of the 286.


5

I've done an experiment to confirm what Stephen Kitt says in his answer. I've tried some instructions on my AMD 286 system, using the boot sector-based playground given at the bottom of this answer (compilable with FASM). Namely, when I have lock uncommented and db 0xf1 commented out (see the code after the enterRing3 label), my 286 system prints #BP #GP (#...


4

"a hardware device ... which apparently sat between the 6502 and its socket to trap any undocumented opcodes. ... Assuming such a device existed, how did that work?" That sounds a lot like "the KK Computer: a Radical 6502 Redesign". The 6502 was designed to have a unified Princeton architecture, not a split I/D memory. However, the 6502 has a "SYNC" pin ...


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