40
votes
Accepted
What 8086 instructions accept REP?
All of them. But it will only have an effect with a select few.
Contrary to what the question implies, the rep prefix is not an orthogonal looping construct that can be combined with any instruction. ...
- 25k
21
votes
Accepted
Why doesn't the NMOS 6502 have the illegal instruction, STA immediate?
Applying the same decoding logic to $89 as is applied to $85, $A9, and $A5 would result in an instruction whose external behavior would match LDA #imm, but which doesn't update any registers or flags. ...
- 39.2k
20
votes
How did the Trap65 work?
This is explained in “Add a trap vector for unimplemented 6502 opcodes” by Carl W. Moser, published in Dr. Dobb’s Journal volume 4, page 32 (page 42 in the PDF; this is linked from the Wikipedia ...
- 131k
18
votes
Accepted
Can we express the instructions to the Analytical Engine in terms of assembler or machine code?
Yes. In fact, it is a very simple system in machine language terms.
The key to understanding the system is to look at the physical construction of the part you saw. This is what we would today would ...
- 21k
16
votes
Undocumented instructions in x86 CPU prior to 80386?
Let's try it on real hardware...
I ran some of these on a vintage Turbo XT with a real V20, here are the results.
TLDR? Conclusion:
AAM imm8 - works the same as 8088, where second byte is used as ...
- 1,367
13
votes
Has there been any effort to research the undocumented Thumb instructions of ARM7TDMI?
The Thumb instruction set is a compressed form of a subset of the full-size ARM instructions. As part of the fetch unit, there is a decoder which expands each 16-bit Thumb instruction into the ...
- 16.9k
12
votes
Did x86 CPU vendors like Intel, NEC, AMD, and Cyrix provide their own debugger for DOS with better CPU support and was it free?
No. While DOS competitors did improve on various DOS commands to try and differentiate their products from Microsoft's there was no equivalent motivation for CPU manufacturers whose products were used ...
- 832
12
votes
Accepted
Why doesn't Visual6502 simulate RRA in the way I expect?
Look further down in the print-out. The A register shows as updated after the first byte fetch of that next instruction.
Starting with the bytes 67 02 20 10, which seem to be what you had:
cycle ab ...
- 476
12
votes
What 8086 instructions accept REP?
You can't repeat arbitrary instructions with rep.
In asm syntax, rep just means to include an F3 byte as a prefix for this instruction. There is no implication that it actually means repeat, it's ...
- 3,567
12
votes
Undocumented instructions in x86 CPU prior to 80386?
They behave like aliases for the documented instructions. They are present and functionally equivalent. There's also SALC (D6 but not on the NEC), ICEBP (F1), string instructions using ES: override; ...
- 1,332
12
votes
0F1h opcode-prefix on i80286
According to an Intel document describing opcodes which don’t result in exception 6,
The 0F1H opcode is a prefix which performs no function. It counts like any other prefix towards the maximum ...
- 131k
11
votes
Accepted
Does the NES handle unlisted processor instructions differently from the Famicom?
To my knowledge, the NES and the Famicom had the exact same CPU (a Ricoh 2A03). So, it's unlikely there were any differences in behavior between the two with regards to undocumented opcodes. As the ...
- 37k
10
votes
Accepted
Undocumented ModR/M byte combinations
As part of his series about the 8086 micro code Ken Shirriff has just added a blog post where he analyses some of the mentioned cases:
Undocumented 8086 instructions, explained by the microcode
It ...
- 236k
10
votes
Accepted
0F1h opcode-prefix on i80286
While it is officially documented as "a prefix which performs no function", a thread on the vcfed.org forums has discovered it is an ICE-mode prefix that forces the instruction's memory access to be ...
- 351
9
votes
Undocumented instructions in x86 CPU prior to 80386?
In the days of "no unnecessary transistors allowed", it was common to simply let the decoding logic do whatever it naturally did in cases that weren't intended to have defined behavior. The ...
- 3,085
8
votes
Why doesn't the NMOS 6502 have the illegal instruction, STA immediate?
TL;DR:
Why doesn't the NMOS 6502 have the illegal instruction, STA immediate?
It doesn't, because $89 is none of the undecoded ('illegal') operations, but decoded as NOP by design.
So in a ...
- 236k
6
votes
Why doesn't Visual6502 simulate RRA in the way I expect?
Although it's often convenient to think of each instruction as starting with an opcode fetch, it's more accurate to think of each instruction's execution as starting on the cycle after its opcode is ...
- 39.2k
6
votes
Undocumented instructions in x86 CPU prior to 80386?
MAME's 8086/88/186/188/286 emulator here, V20/V30/V33/V33A emulator here, and V30MZ emulator here all support 83/1, 83/4, and 83/6, and all appear to support a segment override prefix for XLAT. Search ...
- 2,604
6
votes
0F1h opcode-prefix on i80286
I've done an experiment to confirm what Stephen Kitt says in his answer. I've tried some instructions on my AMD 286 system, using the boot sector-based playground given at the bottom of this answer (...
- 1,454
5
votes
Has there been any effort to research the undocumented Thumb instructions of ARM7TDMI?
Undefined instructions are those not understood by the main ARM CPU core. If there is also no coprocessor that understands them, then an undefined instruction trap is executed to allow for software to ...
- 37.2k
5
votes
Accepted
Is scratchpad register 15 directly addressable on the F3850 (except as QL)?
As pointed out in the comments to my question, the VESWiki opcode table I linked to only defines operations for scratchpad registers 0 through 14. So it is in fact consistent with the F8 Guide to ...
- 1,549
4
votes
Accepted
How did the Trap65 work?
"a hardware device ... which apparently sat between the 6502 and its socket to trap any undocumented opcodes. ... Assuming such a device existed, how did that work?"
That sounds a lot like "the KK ...
- 216
3
votes
Why doesn't the NMOS 6502 have the illegal instruction, STA immediate?
For me, the instruction:
STA #$00
as an example, makes no sense. Where does $00 get stored? There is no address. Compare that with:
LDA #$00
Which loads the immediate value of $00 into the A ...
- 3,057
3
votes
Has there been any effort to research the undocumented Thumb instructions of ARM7TDMI?
After the 8 bit processors (6510, Z80 & so on), the decode units tend to do one of 2 things. They either map illegal op-codes to become NOP instructions (as the 65C816 did) or trigger an exception....
- 71
2
votes
Can we express the instructions to the Analytical Engine in terms of assembler or machine code?
Can we express the instructions to the Analytical Engine in terms of
assembler or machine code?
Yes, we can, and there is an online emulator doing just that. You can type in 'cards' in symbolic form ...
- 38.2k
1
vote
Has there been any effort to research the undocumented Thumb instructions of ARM7TDMI?
Preface:
It is important to keep in mind that ARM instruction sets, as defined by ARM, are just that, definitions, not implementations. While ARM does provide templates, manufactures do their ...
- 236k
1
vote
Undocumented instructions in x86 CPU prior to 80386?
These opcodes are "not used" on 8086/8088 according to this manual: [...] but the meaning of "not used" is unclear [...]
Err... what of 'not used' is unclear? For a CPU, its ...
- 236k
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