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6

The JR instructions are slow when the branch is taken because they use a four-bit(!) ALU to compute the new address. This calculation can't start until after the target address is fetched (which it always will be). If the branch is skipped, the Z80 will skip those additional calculations. When processing a JP instruction, the Z80 fetches the next two bytes ...


3

You can determine overflow for addition and subtraction of two signed bytes A and B as follows. First flip bit 7 of both A and B. This will not affect the result of (8 bit) addition or subtraction, nor of the sign flag, but it will affect the carry. Then for addition compute A+B. The overflow flag will be (carry == sign). For subtraction compute A-B. The ...


5

Overflow occurs on addition when two numbers with the same sign add up to a number with a different sign. It occurs on subtraction when two numbers with different signs produce a result with the same sign as the second number. So the general rule is: a number begins on one side of zero; the add or subtract should move it further away from zero; somehow it ...


2

A lot of memory-mapped I/O is NOT read-write. You are imagining the I/O port is like a byte of memory that you could read and write. No it's not. (unless the manufacturer spends some extra silicon to make it so). For instance, I'm just making up a hypothetical here, but A808-9 might be A808-9 reading: value 0-255 for analog joystick #1 input, X and Y axis, ...


5

Other answers note that most SID chip registers are write-only, but didn't really go into why. When connecting storage elements to a bus, separate circuitry is required to read and write them. If a device has many storage elements whose state need not be made available to outside electronics (as would be the case for a RAM), all of the storage elements can ...


26

I think your ORA D404 instruction is trying to read from the SID registers, which is not possible. You can't rely on the value read from that address. Register 04 is write-only. If you want to do read-modify-store on a SID register, you will need to keep a copy of the SID registers in RAM. That way, you load the old value from RAM, do your operations, and ...


3

The header file that is used in your linked source code directs WLA to compile for a ROM using the LOROM map and the first 32K of ROM are mapped into bank 0 at offsets $8000-$FFFF. So your (mapped) code starts at offset $8000, not 0. As for the VBlank label: the header expects an NMI routine at that label, so your code must define an interrupt routine for ...


10

The 16-color modes on the VGA use a hardware design borrowed from the EGA. On the EGA (and VGA), the bitwise drawing modes don't act upon memory directly, but instead act upon values stored in four eight-bit registers, each of which holds a byte of data from one of four color planes. Reading any byte of data from the display will load each of the four ...


14

Running your code as-is on a real 286/VGA (Cirrus Logic CL-GD5420) produces this image: Inserting one dummy read before the second fill cycle (just mov ax, es:[0]) gives the image you were expecting: So it would seem that at least there might be a difference between the DOSBox implementation and the real hardware. If it does implement logic operations, ...


11

To quote the description of your link (emphasis mine): The DSECT directive is used to define an area of memory [...] without actually generating any output object code. [...] The most common use [...] is to define the labels [...] that occur in the [...] page zero. So the reason why you do not get an "A" is that your DSECT doesn't produce any ...


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